Q1. What is the meaning of RAM, and what is its primary role?.
A. Readily Available Memory; it is the first level of memory used by the computer in all of its operations..
B. Random Access Memory; it is memory that can be reached by any sub- system within a computer, and at any time..
C. Random Access Memory; it is the memory used for short-term temporary data storage within the computer..
D. Resettable Automatic Memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to..
Answer= Random Access Memory; it is the memory used for short-term temporary data storage within the computer.
Q2. The storage element for a static RAM is the ________..
A. diode.
B. resistor.
C. capacitor.
D. flip-flop.
Answer= flip-flop
Q3. In a DRAM, what is the state of R/W during a read operation?.
A. Low.
B. High.
C. Hi-Z.
D. None of the above.
Answer= High
Q4. The condition occurring when two or more devices try to write data to a bus simultaneously is called ________..
A. address decoding.
B. bus contention.
C. bus collisions.
D. address multiplexing.
Answer= bus contention
Q5. Which is/are the basic refresh mode(s) for dynamic RAM?.
A. Burst refresh.
B. Distributed refresh.
C. Open refresh.
D. Burst refresh and distributed refresh.
Answer= Burst refresh and distributed refresh
Q6. One of the most important specifications on magnetic media is the ________..
A. rotation speed.
B. tracks per inch.
C. data transfer rate.
D. polarity reversal rate.
Answer= data transfer rate
Q7. A 64-bit word consists of ________..
A. 4 bytes.
B. 8 bytes.
C. 10 bytes.
D. 12 bytes.
Answer= 8 bytes
Q8. The reason the data outputs of most ROM ICs are tristate outputs is to:.
A. allow for three separate data input lines..
B. allow the bidirectional flow of data between the bus lines and the ROM registers..
C. permit the connection of many ROM chips to a common data bus..
D. isolate the registers from the data bus during read operations..
Answer= permit the connection of many ROM chips to a common data bus.
Q9. Select the statement that best describes Read-Only Memory (ROM)..
A. nonvolatile, used to store information that changes during system operation.
B. nonvolatile, used to store information that does not change during system operation.
C. volatile, used to store information that changes during system operation.
D. volatile, used to store information that does not change during system operation.
Answer= nonvolatile, used to store information that does not change during system operation
Q10. What is the maximum time required before a dynamic RAM must be refreshed?.
A. 2 ms.
B. 4 ms.
C. 8 ms.
D. 10 ms.
Answer= 2 ms
Q11. Which of the following best describes random-access memory (RAM)?.
A. a type of memory in which access time depends on memory location.
B. a type of memory that can be written to only once but can be read from an infinite number of times.
C. a type of memory in which access time is the same for each memory location.
D. mass memory.
Answer= a type of memory in which access time is the same for each memory location
Q12. Which of the following best describes static memory devices?.
A. memory devices that are magnetic in nature and do not require constant refreshing.
B. memory devices that are magnetic in nature and require constant refreshing.
C. semiconductor memory devices in which stored data will not be retained with the power applied unless constantly refreshed.
D. semiconductor memory devices in which stored data is retained as long as power is applied.
Answer= semiconductor memory devices in which stored data is retained as long as power is applied
Q13. Which is not a removable drive?.
A. Zip.
B. Jaz.
C. Hard.
D. SuperDisk.
Answer= Hard
Q14. Which of the following best describes EPROMs?.
A. EPROMs can be programmed only once..
B. EPROMs can be erased by UV..
C. EPROMs can be erased by shorting all inputs to the ground..
D. All of the above..
Answer= EPROMs can be erased by UV.
Q15. How many storage locations are available when a memory device has 12 address lines?.
A. 144.
B. 512.
C. 2048.
D. 4096.
Answer= 4096
Q16. FIFO is formed by an arrangement of ________..
A. diodes.
B. transistors.
C. MOS cells.
D. shift registers.
Answer= shift registers
Q17. CCD stands for ________..
A. capacitor charging device.
B. capacitor-capacitor drain.
C. charged-capacitor device.
D. charge-coupled device.
Answer= charge-coupled device
Q18. What is the major difference between SRAM and DRAM?.
A. DRAMs must be periodically refreshed..
B. SRAMs can hold data via a static charge, even with power off..
C. The only difference is the terminal from which the data is removed - from the FET Drain or Source..
D. Dynamic RAMs are always active; static RAMs must reset between data read/write cycles..
Answer= DRAMs must be periodically refreshed.
Q19. Which of the following best describes volatile memory?.
A. memory that retains stored information when electrical power is removed.
B. memory that loses stored information when electrical power is removed.
C. magnetic memory.
D. nonmagnetic.
Answer= memory that loses stored information when electrical power is removed
Q20. What is a major disadvantage of RAM?.
A. Its access speed is too slow..
B. Its matrix size is too big..
C. It is volatile..
D. High power consumption.
Answer= It is volatile.
Q21. What two functions does a DRAM controller perform?.
A. address multiplexing and data selection.
B. address multiplexing and the refresh operation.
C. data selection and the refresh operation.
D. data selection and CPU accessing.
Answer= address multiplexing and the refresh operation
Q22. Dynamic memory cells store a data bit in a ________..
A. diode.
B. resistor.
C. capacitor.
D. flip-flop.
Answer= capacitor
Q23. Which is not part of a hard disk drive?.
A. Spindle.
B. Platter.
C. Read/write head.
D. Valve.
Answer= Valve
Q24. ROMs retain data when the ________..
A. power is off.
B. power is on.
C. system is down.
D. all of the above.
Answer= all of the above
Q25. Which type of ROM can be erased by an electrical signal?.
A. ROM.
B. mask ROM.
C. EPROM.
D. EEPROM.
Answer= EEPROM
Q26. Suppose that a certain semiconductor memory chip has a capacity of 8K x 8. How many bytes could be stored in this device?.
A. 8,000.
B. 64,000.
C. 65,536.
D. 8,192.
Answer= 8,192
Q27. Data is written to and read from the disk via a magnetic ________ head mechanism in the floppy drive..
A. cylinder.
B. read/write.
C. recordable.
D. cluster.
Answer= read/write
Q28. A 64-Mbyte SIMM is installed into a system, but when a memory test is executed, the SIMM is detected as a 32-Mbyte device. What is a possible cause?.
A. The memory module was not installed properly..
B. The voltage on the memory module is incorrect..
C. The most significant address line is stuck high or low..
D. The address decoder on the SIMM is faulty..
Answer= The address decoder on the SIMM is faulty.
Q29. How many address lines would be required for a 2K x 4 memory chip?.
A. 8.
B. 10.
C. 11.
D. 12.
Answer= 11
Q30. When a RAM module passes the checkerboard test it is:.
A. able to read and write only 1s..
B. faulty..
C. probably good..
D. able to read and write only 0s..
Answer= probably good.
Q31. Which type of ROM has to be custom built by the factory?.
A. ROM.
B. mask ROM.
C. EPROM.
D. EEPROM.
Answer= mask ROM
Q32. What is the computer main memory?.
A. Hard drive and RAM.
B. CD-ROM and hard drive.
C. RAM and ROM.
D. CMOS and hard drive.
Answer= RAM and ROM
Q33. A major disadvantage of the mask ROM is that it:.
A. is time consuming to change the stored data when system requirements change.
B. is very expensive to change the stored data when system requirements change.
C. cannot be reprogrammed if stored data needs to be changed.
D. has an extremely short life expectancy and requires freQnt replacement.
Answer= cannot be reprogrammed if stored data needs to be changed
Q34. The periodic recharging of DRAM memory cells is called ________..
A. multiplexing.
B. bootstrapping.
C. refreshing.
D. flashing.
Answer= refreshing
Q35. Which of the following is normally used to initialize a computer system's hardware?.
A. Bootstrap memory.
B. Volatile memory.
C. External mass memory.
D. Static memory.
Answer= Bootstrap memory
Q36. What is the difference between static RAM and dynamic RAM?.
A. Static RAM must be refreshed, dynamic RAM does not..
B. There is no difference..
C. Dynamic RAM must be refreshed, static RAM does not..
D. None of the mentioned.
Answer= Dynamic RAM must be refreshed, static RAM does not.
Q37. Microprocessors and memory ICs are generally designed to drive only a single TTL load. Therefore, if several inputs are being driven from the same bus, any memory IC must be ________..
A. buffered.
B. decoded.
C. addressed.
D. stored.
Answer= buffered
Q38. What are the typical values of tOE?.
A. 10 to 20 ns for bipolar.
B. 25 to 100 ns for NMOS.
C. 12 to 50 ns for CMOS.
D. All of the above.
Answer= All of the above
Q39. Which type of ROM can be erased by UV light?.
A. ROM.
B. mask ROM.
C. EPROM.
D. EEPROM.
Answer= EPROM
Q40. Which of the following is NOT a type of memory?.
A. RAM.
B. ROM.
C. FPROM.
D. EEPROM.
Answer= FPROM
Q41. How many address bits are required for a 4096-bit memory organized as a 512 x 8 memory?.
A. 2.
B. 4.
C. 8.
D. 9.
Answer= 9
Q42. In general, the ________ have the smallest bit size and the ________ have the largest..
A. EEPROMs, Flash.
B. SRAM, mask ROM.
C. mask ROM, SRAM.
D. DRAM, PROM.
Answer= EEPROMs, Flash
Q43. Advantage(s) of an EEPROM over an EPROM is/are:.
A. the EPROM can be erased with ultraviolet light in much less time than an EEPROM.
B. the EEPROM can be erased and reprogrammed without removal from the circuit.
C. the EEPROM has the ability to erase and reprogram individual words.
D. the EEPROM can be erased and reprogrammed without removal from the circuit, and can erase and reprogram individual words.
Answer= the EEPROM can be erased and reprogrammed without removal from the circuit, and can erase and reprogram individual words
Q44. The mask ROM is ________..
A. permanently programmed during the manufacturing process.
B. volatile.
C. easy to reprogram.
D. extremely expensive.
Answer= permanently programmed during the manufacturing process
Q45. Which of the following memories uses a MOS capacitor as its memory cell?.
A. SRAM.
B. DRAM.
C. ROM.
D. FIFO.
Answer= DRAM
Q46. Which of the following faults will the checkerboard pattern test for in RAM?.
A. Short between adjacent cells.
B. Ability to store both 0s and 1s.
C. Dynamically introduced errors between cells.
D. All of the above.
Answer= All of the above
Q47. On a CD-ROM, ________ are raised areas representing a 1..
A. mounds.
B. lands.
C. holes.
D. pits.
Answer= lands
Q48. The location of a unit of data in a memory array is called its ________..
A. storage.
B. RAM.
C. address.
D. data.
Answer= address
Q49. On a CD-ROM, ________ are recessed areas representing a 0..
A. mounds.
B. lands.
C. holes.
D. pits.
Answer= pits
Q50. Why is a refresh cycle necessary for a dynamic RAM?.
A. to clear the flip-flops.
B. to set the flip-flops.
C. The refresh cycle discharges the capacitor cells..
D. The refresh cycle keeps the charge on the capacitor cells..
Answer= The refresh cycle keeps the charge on the capacitor cells.
Q51. Which is not a magnetic storage device?.
A. Magnetic disk.
B. Magnetic tape.
C. Magneto-optical disk.
D. Optical disk.
Answer= Optical disk
Q52. he time from the beginning of a read cycle to the end of tACS or tAA is referred to as:.
A. access time.
B. data hold.
C. read cycle time.
D. write enable time.
Answer= access time
Q53. Which of the following memories is volatile?.
A. ROM.
B. EROM.
C. RAM.
D. Flash.
Answer= RAM
Q54. What is the principal advantage of using address multiplexing with DRAM memory?.
A. reduced memory access time.
B. reduced requirement for constant refreshing of the memory contents.
C. reduced pin count and decrease in package size.
D. It eliminates the requirement for a chip-select input line, thereby reducing the pin count..
Answer= reduced pin count and decrease in package size
Q55. What is a multitap digital delay line?.
A. a series of inverter gates with RC circuits between each one.
B. a series of inverter gates with RL circuits between each one.
C. a series of NAND gates with RC circuits between each one.
D. a series of NAND gates with RL circuits between each one.
Answer= a series of inverter gates with RC circuits between each one
Q56. The bit capacity of a memory that has 2048 addresses and can store 8 bits at each address is ________..
A. 4096.
B. 8129.
C. 16358.
D. 32768.
Answer= 16358
Q57. The mask ROM is ________..
A. MOS technology.
B. diode technology.
C. resistor-diode technology.
D. DROM technology.
Answer= MOS technology
Q58. Which of the following is not a flash memory mode or operation?.
A. Burst.
B. Read.
C. Erase.
D. Programming.
Answer= Burst
Q59. The smallest unit of binary data is the ________..
A. bit.
B. nibble.
C. byte.
D. word.
Answer= bit
Q60. Select the statement that best describes the fusible-link PROM..
A. user-programmable, one-time programmable.
B. manufacturer-programmable, one-time programmable.
C. user-programmable, reprogrammable.
D. manufacturer-programmable, reprogrammable.
Answer= user-programmable, one-time programmable
Q61. How can UV erasable PROMs be recognized?.
A. There is a small window on the chip..
B. They will have a small violet dot next to the #1 pin..
C. Their part number always starts with a "U", such as in U12..
D. They are not readily identifiable, since they must always be kept under a small cover..
Answer= There is a small window on the chip.
Q62. What part of a Flash memory architecture manages all chip functions?.
A. I/O pins.
B. floating-gate MOSFET.
C. command code.
D. program verify code.
Answer= floating-gate MOSFET
Q63. An 8-bit address code can select ________..
A. 8 locations in memory.
B. 256 locations in memory.
C. 65,536 locations in memory.
D. 131,072 locations in memory.
Answer= 256 locations in memory
Q64. Which is not a hard disk performance parameter?.
A. Seek time.
B. Break time.
C. Latency period.
D. Access time.
Answer= Break time
Q65. The ideal memory ________..
A. has high storage capacity.
B. is nonvolatile.
C. has in-system read and write capacity.
D. has all of the above characteristics.
Answer= has all of the above characteristics
Q66. To which pin on the RAM chip does the address decoder connect in order to signal which memory chip is being accessed?.
A. The address input.
B. The output enable.
C. The chip enable.
D. The data input.
Answer= The chip enable
Q67. EEPROM stands for ________..
A. encapsulated electrical programmable read-only memory.
B. elementary electrical programmable read-only memory.
C. electrically erasable programmable read-only memory.
D. elementary erasable programmable read-only memory.
Answer= electrically erasable programmable read-only memory
Q68. L1 is known as ________..
A. primary cache.
B. secondary cache.
C. DRAM.
D. SRAM.
Answer= primary cache
Q69. Describe the timing diagram of a write operation..
A. First the data is set on the data bus and the address is set, then the write pulse stores the data..
B. First the address is set, then the data is set on the data bus, and finally the read pulse stores the data..
C. First the write pulse stores the data, then the address is set, and finally the data is set on the data bus..
D. First the data is set on the data bus, then the write pulse stores the data, and finally the address is set..
Answer= First the data is set on the data bus and the address is set, then the write pulse stores the data.
Q70. What is the bit storage capacity of a ROM with a 1024 x 8 organization?.
A. 1024.
B. 2048.
C. 4096.
D. 8192.
Answer= 8192
Q71. Which of the following is one of the basic characteristics of DRAMs?.
A. DRAMs must have a constantly changing input..
B. DRAMs must be periodically refreshed in order to be able to retain data..
C. DRAMs have a broader "dynamic" storage range than other types of memories..
D. DRAMs are simpler devices than other types of memories..
Answer= DRAMs must be periodically refreshed in order to be able to retain data.
Q72. The main advantage of semiconductor RAM is its ability to:.
A. retain stored data when power is interrupted or turned off.
B. be written to and read from rapidly.
C. be randomly accessed.
D. be seQntially accessed.
Answer= be written to and read from rapidly
Q73. Which of the following describes the action of storing a bit of data in a mask ROM?.
A. A 1 is stored in a bipolar cell by opening the base connection to the address line..
B. A 0 is stored in a bipolar cell by shorting the base connection to the address line..
C. A 1 is stored by connecting the gate of a MOS cell to the address line..
D. A 0 is stored by connecting the gate of a MOS cell to the address line..
Answer= A 1 is stored by connecting the gate of a MOS cell to the address line.
Q74. Address decoding for dynamic memory chip control may also be used for:.
A. controlling refresh circuits.
B. read and write control.
C. chip selection and address location.
D. memory mapping.
Answer= chip selection and address location
Q75. The difference between a PLA and a PAL is:.
A. The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane..
B. The PAL has a programmable OR plane and a programmable AND plane, while the PLA only has a programmable AND plane..
C. The PAL has more possible product terms than the PLA..
D. PALs and PLAs are the same thing..
Answer= The PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane.
Q76. ALM is the acronym for ________..
A. Array Logic Matrix.
B. Arithmetic Logic Module.
C. Asynchronous Local Modulator.
D. Adaptive Logic Module.
Answer= Adaptive Logic Module