1. Which of the following can transfer multiple bits of data simultaneously?.
A. serial port.
B. sential port.
C. concurrent unit.
D. parallel port.
Answer= parallel port
2. Which of the following are interfaced as inputs to the parallel ports?.
A. LEDs.
B. switch.
C. alphanumeric display.
D. seven segmented display.
Answer= switch
3. Which of the following are interfaced as the outputs to the parallel ports?.
A. keyboards.
B. switches.
C. LEDs.
D. knobs.
Answer= LEDs
4. How many registers are there to control the parallel port in the basic form?.
A. 1.
B. 3.
C. 2.
D. 5.
Answer= 2
5. Which of the following is also known as tri-state?.
A. output port.
B. input port.
C. parallel port.
D. output-input port.
Answer= output port
6. How buffers are enabled in the parallel ports?.
A. by the data register.
B. by data direction register.
C. by individual control register.
D. by data and individual control register.
Answer= by data direction register
7. Which of the following registers offers high impedance?.
A. data register.
B. data direction register.
C. individual control bit.
D. data register and data direction register.
Answer= individual control bit
8. Which of the following can be used as a chip select?.
A. multifunction I/O port.
B. parallel port.
C. DMA port.
D. memory port.
Answer= multifunction I/O port
9. Which of the following is necessary for the parallel input-output port?.
A. inductor.
B. pull-up resistor.
C. push-up resistor.
D. capacitor.
Answer= pull-up resistor
10. Which of the following can be described as general-purpose?.
A. multifunction I/O port.
B. input port.
C. dma port.
D. output port.
Answer= multifunction I/O port
11. What does I2C stand for?.
A. inter-IC.
B. intra-IC.
C. individual integrated chip.
D. intel IC.
Answer= inter-IC
12. Which company developed I2C?.
A. Intel.
B. Motorola.
C. Phillips.
D. IBM.
Answer= Phillips
13. Which of the following is the most known simple interface?.
A. I2C.
B. Serial port.
C. Parallel port.
D. SPI.
Answer= I2C
14. Which are the two lines used in the I2C?.
A. SDA and SPDR.
B. SPDR and SCL.
C. SDA and SCL.
D. SCL and status line.
Answer= SDA and SCL
15. Which of the following developed P82B715?.
A. Philips.
B. Intel.
C. IBM.
D. Motorola.
Answer= Philips
16. Which pin provides the reference clock for the transfer of data?.
A. SDA.
B. SCL.
C. SPDR.
D. Interrupt pin.
Answer= SCL
17. Which of the following are the three hardware signals?.
A. START, STOP, ACKNOWLEDGE.
B. STOP, TERMINATE, END.
C. START, SCL, SDA.
D. STOP, SCL, SDA.
Answer= START, STOP, ACKNOWLEDGE
18. Which of the following performs the START signal?.
A. master.
B. slave.
C. CPU.
D. memory.
Answer= master
19. Which of the following are handshake signals?.
A. START.
B. STOP.
C. ACKNOWLEDGE.
D. START and STOP.
Answer= ACKNOWLEDGE
20. A packet is also referred to as.
A. postcard.
B. telegram.
C. letter.
D. data.
Answer= telegram
21. Which of the following byte performs the slave selection?.
A. first byte.
B. second byte.
C. terminal byte.
D. eighth byte.
Answer= first byte
22. Which of the following indicates the type of operation that the master rests?.
A. address value.
B. initial value.
C. terminal count.
D. first byte.
Answer= address value
23. How can both single byte and the double byte address slave use the same bus?.
A. extended memory.
B. extended address.
C. peripheral count.
D. slave bus.
Answer= extended address
24. Which counter selects the next register in the I2C?.
A. auto-incrementing counter.
B. decrementing counter.
C. auto-decrementing counter.
D. terminal counter.
Answer= auto-incrementing counter
25. Which is an efficient method for the EEPROM?.
A. combined format.
B. auto-incrementing counter.
C. register set.
D. single format.
Answer= combined format
26. Which of the following uses two data transfers?.
A. auto-incrementing counter.
B. auto-decrementing counter.
C. combined format.
D. single format.
Answer= combined format
27. Which of the following is efficient for the small number of registers?.
A. auto-incrementing counter.
B. auto-decrementing counter.
C. combined format.
D. single format.
Answer= auto-incrementing counter
28. Which can determine the timeout value?.
A. polling.
B. timer.
C. combined format.
D. watchdog timer.
Answer= polling
29. How is bus lockup avoided?.
A. timer and polling.
B. combined format.
C. terminal counter.
D. counter.
Answer= timer and polling
30. Which of the following can determine if two masters start to use the bus at the same time?.
A. counter detect.
B. collision detect.
C. combined format.
D. auto-incremental counter.
Answer= collision detect
31. Which ports are used in the multi-master system to avoid errors?.
A. unidirectional port.
B. bidirectional port.
C. multi directional port.
D. tridirectional port.
Answer= bidirectional port
32. Which of the following is the pin efficient method of communicating between other devices?.
A. serial port.
B. parallel port.
C. peripheral port.
D. memory port.
Answer= serial port
33. Which of the following depends the number of bits that are transferred?.
A. wait statement.
B. ready statement.
C. time.
D. counter.
Answer= time
34. Which of the following is the most commonly used buffer in the serial porting?.
A. LIFO.
B. FIFO.
C. FILO.
D. LILO.
Answer= FIFO
35. What does SPI stand for?.
A. serial parallel interface.
B. serial peripheral interface.
C. sential peripheral interface.
D. sential port interface.
Answer= serial peripheral interface
36. Which allows the full duplex synchronous communication between the master and the slave?.
A. SPI.
B. serial port.
C. I2C.
D. parallel port.
Answer= SPI
37. Which of the following processor uses SPI for interfacing?.
A. 8086.
B. 8253.
C. 8254.
D. MC68HC11.
Answer= MC68HC11
38. In which register does the data is written in the master device?.
A. index register.
B. accumulator.
C. SPDR.
D. status register.
Answer= SPDR
39. What happens when 8 bits are transferred in the SPI?.
A. wait statement.
B. ready statement.
C. interrupt.
D. remains unchanged.
Answer= interrupt
40. Which signal is used to select the slave in the serial peripheral interfacing?.
A. slave select.
B. master select.
C. interrupt.
D. clock signal.
Answer= slave select
41. How much time period is necessary for the slave to receive the interrupt and transfer the data?.
A. 4 clock time period.
B. 8 clock time period.
C. 16 clock time period.
D. 24 clock time period.
Answer= 8 clock time period
42. Which mode of the Intel timer 8253 provides a software watchdog timer?.
A. rate generator.
B. hardware triggered strobe.
C. square wave rate generator.
D. software triggered strobe.
Answer= software triggered strobe
43. Which of the following mode is similar to the mode 4 of the 8253 timer?.
A. mode 5.
B. mode 6.
C. mode 0.
D. mode 1.
Answer= mode 5
44. Which pin of 8253 is used for the generation of an external interrupt signal?.
A. OUT pin.
B. IN pin.
C. Interrupt pin.
D. Ready pin.
Answer= OUT pin
45. Which timer architecture can provide a higher resolution than Intel 8253?.
A. Intel 8253.
B. Intel 8254.
C. 8051 timer.
D. MC68230.
Answer= MC68230
46. How many bit architecture does MC68230 have?.
A. 16.
B. 24.
C. 32.
D. 40.
Answer= 24
47. How many bit bus does MC68230 have?.
A. 2.
B. 4.
C. 8.
D. 16.
Answer= 8
48. Which of the following is a timer processor?.
A. Intel 8253.
B. MC146818.
C. MC68332.
D. Intel 8259.
Answer= MC68332
49. What is the running frency of MC68332?.
A. 12 MHz.
B. 14 MHz.
C. 16 MHz.
D. 18 MHz.
Answer= 16 MHz
50. Which of the following is a real time clock?.
A. MC146818.
B. 8253.
C. 8259.
D. 8254.
Answer= MC146818
51. Which of the following helps in the generation of waveforms?.
A. timer.
B. inputs.
C. outputs.
D. memory.
Answer= timer
52. Which bit size determines the slowest frency?.
A. counter size.
B. pre-scalar value.
C. counter.
D. timer.
Answer= pre-scalar value
53. Which bit size determines the maximum value of the counter-derived period?.
A. counter size.
B. pre-scalar value.
C. bit size.
D. byte size.
Answer= counter size
54. Which of the following timer is suitable for IBM PC?.
A. IA-32.
B. Intel 8253.
C. Intel 64.
D. 8051 timer.
Answer= Intel 8253
55. Which of the following is mode 0 in 8253?.
A. interrupt on start count.
B. interrupt for wait statement.
C. interrupt on terminal count.
D. no interrupt.
Answer= interrupt on terminal count
56. Which determines the mode 1 in the Intel 8253?.
A. interrupt on terminal count.
B. programmable one-shot.
C. rate generator.
D. square wave rate generator.
Answer= programmable one-shot
57. Which mode of 8253 can provide pulse width modulation?.
A. programmable one-shot.
B. square wave rate generator.
C. software triggered strobe.
D. hardware triggered strobe.
Answer= programmable one-shot
58. Which of the following is the mode 3 in the Intel timer 8253?.
A. rate generator.
B. hardware triggered strobe.
C. square wave rate generator.
D. software triggered strobe.
Answer= rate generator
59. Which of the following determines the rate generation?.
A. divide by N.
B. multiply by N.
C. addition by N.
D. subtraction by N.
Answer= divide by N
60. Which mode of the Intel 8253 timer can generate a square wave?.
A. mode 1.
B. mode 2.
C. mode 3.
D. mode 4.
Answer= mode 4
61. What does UART stand for?.
A. universal asynchronous receiver transmitter.
B. uni asynchronous receiver transmitter.
C. universal address receiver transmitter.
D. uni address receiver transmitter.
Answer= universal asynchronous receiver transmitter
62. How is data detected in a UART?.
A. counter.
B. timer.
C. clock.
D. first bit.
Answer= clock
63. Which of the signal is set to one, if no data is transmitted?.
A. READY.
B. START.
C. STOP.
D. TXD.
Answer= TXD
64. What rate can define the timing in the UART?.
A. bit rate.
B. baud rate.
C. speed rate.
D. voltage rate.
Answer= baud rate
65. How is the baud rate supplied?.
A. baud rate voltage.
B. external timer.
C. peripheral.
D. internal timer.
Answer= external timer
66. Which is the most commonly used UART?.
A. 8253.
B. 8254.
C. 8259.
D. 8250.
Answer= 8250
67. Which company developed 16450?.
A. Philips.
B. Intel.
C. National semiconductor.
D. IBM.
Answer= National semiconductor
68. What does ADS indicate in 8250 UART?.
A. address signal.
B. address terminal signal.
C. address strobe signal.
D. address generating signal.
Answer= address strobe signal
69. Which of the following signals are active low in the 8250 UART?.
A. BAUDOUT.
B. DDIS.
C. INTR.
D. MR.
Answer= BAUDOUT
70. Which of the signal can control bus arbitration logic in 8250?.
A. MR.
B. DDIS.
C. INTR.
D. RCLK.
Answer= DDIS
71. Which of the following can be used for long distance communication?.
A. I2C.
B. Parallel port.
C. SPI.
D. RS232.
Answer= RS232
72. Which of the following can affect the long distance communication?.
A. clock.
B. resistor.
C. inductor.
D. capacitor.
Answer= clock
73. Which are the serial ports of the IBM PC?.
A. COM1.
B. COM4 and COM1.
C. COM1 and COM2.
D. COM3.
Answer= COM1 and COM2
74. Which of the following can provide hardware handshaking?.
A. RS232.
B. Parallel port.
C. Counter.
D. Timer.
Answer= RS232
75. Which of the following have an asynchronous data transmission?.
A. SPI.
B. RS232.
C. Parallel port.
D. I2C.
Answer= RS232
76. How many areas does the serial interface have?.
A. 1.
B. 3.
C. 2.
D. 4.
Answer= 2
77. The RS232 is also known as.
A. UART.
B. SPI.
C. Physical interface.
D. Electrical interface.
Answer= Electrical interface
78. How much voltage does the MC1489 can take?.
A. 12V.
B. 5V.
C. 3.3V.
D. 2.2V.
Answer= 5V
79. Which of the following is not a serial protocol?.
A. SPI.
B. I2C.
C. Serial port.
D. RS232.
Answer= RS232
80. Which of the following is an ideal interface for LCD controllers?.
A. SPI.
B. parallel port.
C. Serial port.
D. M-Bus.
Answer= M-Bus
81. Which can prevent the terminal of data transmission?.
A. flow control.
B. increasing flow.
C. increasing count.
D. terminal count.
Answer= flow control
82. Which of the following is the first flow control method?.
A. software handshaking.
B. hardware handshaking.
C. UART.
D. SPI.
Answer= hardware handshaking
83. Which one of the following is the second method for flow controlling?.
A. hardware.
B. peripheral.
C. software.
D. memory.
Answer= software
84. Which can restart the data transmission?.
A. XON.
B. XOFF.
C. XRST.
D. restart button.
Answer= XON
85. Which of the following is a common connector?.
A. UART.
B. SPI.
C. I2C.
D. DB-25.
Answer= DB-25
86. What does pin 22 in DB-25 indicate?.
A. transmit data.
B. receive data.
C. ring indicator.
D. signal ground.
Answer= ring indicator
87. Which pin indicates the DSR in DB-25?.
A. 1.
B. 2.
C. 4.
D. 6.
Answer= 6
88. Which of the following connections are one to one?.
A. Modem cables.
B. SPI.
C. UART.
D. I2C.
Answer= Modem cables
89. Which of the following are used to link PCs?.
A. modem cable.
B. null modem cable.
C. serial port.
D. parallel port.
Answer= null modem cable
90. Which of the following method is used by Apple Macintosh?.
A. hardware handshaking.
B. software handshaking.
C. no handshaking.
D. null modem cable.
Answer= software handshaking
91. Which of the following is used to reset the device in 8250?.
A. MR.
B. DDIS.
C. INTR.
D. RCLK.
Answer= MR
92. Which provides an input clock for the receiver part of the UART 8250?.
A. RD.
B. RCLK.
C. MR.
D. DDIS.
Answer= RCLK
93. Which of the following is a general purpose I/O pin?.
A. OUT1.
B. RD.
C. ADS.
D. MR.
Answer= OUT1
94. Which of the following indicate the type of access that the CPU needs to perform?.
A. MR.
B. RD.
C. ADS.
D. RCLK.
Answer= RD
95. Which pins are used for additional DMA control?.
A. RXRDY.
B. RD.
C. MR.
D. INR.
Answer= RXRDY
96. Which of the following are not used within the IBM PC?.
A. TXRDY.
B. BAUDOUT.
C. ADS.
D. OUT2.
Answer= TXRDY
97. Which pins are used to connect an external crystal?.
A. INR.
B. ADS.
C. XIN.
D. SIN.
Answer= XIN
98. Which UART is used in MC680 by 0 design?.
A. Intel 8250.
B. 16450.
C. 16550.
D. MC68681.
Answer= MC68681
99. Which of the following have large FIFO buffer?.
A. 8253.
B. 8250.
C. 16550.
D. 16450.
Answer= 16550
100. Which of the following has a quadruple buffered receiver and a double buffered transmitter?.
A. Intel 8250.
B. 16450.
C. 16550.
D. MC68681.
Answer= MC68681
101. Which of the following provides an efficient method for transferring data from a peripheral to memory?.
A. dma controller.
B. serial port.
C. parallel port.
D. dual port.
Answer= dma controller
102. Which of the following can be adopted for the systems which does not contain DMA controller for data transmission?.
A. counter.
B. timer.
C. polling.
D. memory.
Answer= polling
103. Which of the following have low-level buffer filling?.
A. output.
B. peripheral.
C. dma controller.
D. input.
Answer= dma controller
104. How many classifications of DMA controllers are made based on the addressing capability?.
A. 2.
B. 3.
C. 4.
D. 5.
Answer= 3
105. How many address register are there for the 1D type DMA controller?.
A. 1.
B. 2.
C. 3.
D. 4.
Answer= 1
106. Which of the following of a generic DMA controller contain a base address register and an auto-incrementing counter?.
A. address bus.
B. data bus.
C. bus rester.
D. address generator.
Answer= address generator
107. Which of the following is used to transfer the data from the DMA controller to the destination?.
A. data bus.
B. address bus.
C. rest bus.
D. interrupt signal.
Answer= data bus
108. Which of the following is used to rest the bus from the main CPU?.
A. data bus.
B. address bus.
C. bus rester.
D. interrupt signal.
Answer= bus rester
109. Which signal can identify the error?.
A. data bus.
B. address bus.
C. bus rester.
D. interrupt signal.
Answer= interrupt signal
110. Which signal allows the DMA controller to select the peripheral?.
A. local peripheral control.
B. global peripheral control.
C. address bus.
D. data bus.
Answer= local peripheral control
111. Which of the following is also known as implicit address?.
A. dual address model.
B. single address model.
C. 1D model.
D. 2D model.
Answer= single address model
112. Which address mode uses two addresses and two accesses to transfer the data between the peripheral and the memory?.
A. dual address model.
B. 1D model.
C. 2D model.
D. 3D model.
Answer= dual address model
113. Which of the following address mode uses a buffer to hold data temporarily?.
A. 1D model.
B. 2D model.
C. dual address model.
D. 3D model.
Answer= dual address model
114. Which of the following model can implement a circular buffer?.
A. dual address mode.
B. 1D model.
C. 2D model.
D. 3D model.
Answer= 1D model
115. Which of the following uses an address and a counter to define the sence of addresses?.
A. dual address mode.
B. 2D model.
C. 1D model.
D. 3D model.
Answer= 1D model
116. Which of the following is used to calculate an offset to base address?.
A. single address mode.
B. dual address mode.
C. 1D model.
D. 2D model.
Answer= 2D model
117. Which can provide an address stride?.
A. single address mode.
B. dual address mode.
C. 1D model.
D. 2D model.
Answer= 2D model
118. How is the count register can be splitted?.
A. 2.
B. 3.
C. 4.
D. 5.
Answer= 2
119. Which of the following has the ability to change the stride automatically?.
A. 1D model.
B. 2D model.
C. 3D model.
D. dual address mode.
Answer= 3D model
120. Which is used to prioritise multiple rests?.
A. dual address mode.
B. single address mode.
C. arbitration.
D. chaining.
Answer= arbitration
121. Which of the following DMA is used in the IBM PC?.
A. Intel 8253.
B. Intel 8254.
C. Intel 8237.
D. Intel 8259.
Answer= Intel 8237
122. Which of the following have four transfer modes?.
A. Intel 8253.
B. Intel 8254.
C. Intel 8259.
D. Intel 8237.
Answer= Intel 8237
123. Identify the additional transfer mode in the Intel 8237?.
A. single transfer mode.
B. demand transfer mode.
C. verify transfer mode.
D. block transfer mode.
Answer= verify transfer mode
124. Which of the following transfer mode can refresh the DRAM memory?.
A. verify transfer mode.
B. bloch transfer mode.
C. demand transfer mode.
D. cascade mode.
Answer= verify transfer mode
125. Which of the following is used for supporting the priority scheme?.
A. address transfer mode.
B. arbitration.
C. counter.
D. timer.
Answer= arbitration
126. Which of the following consist of a fully programmable DMA controller of two channels?.
A. MC68300.
B. Intel 8237.
C. Intel 8253.
D. Intel 8254.
Answer= MC68300
127. Which cycle can support the burst and single transfer mode?.
A. internal.
B. external.
C. both internal and external.
D. address cycle.
Answer= external
128. Which of the following requires its own local memory and program?.
A. DMA controller.
B. DMA address.
C. DMA CPU.
D. DMA peripheral.
Answer= DMA CPU
129. Which DMA is programmed with higher level software?.
A. DMA controller.
B. DMA address.
C. DMA peripheral.
D. DMA CPU.
Answer= DMA CPU
130. Which of the following combine an MC68000/MC68020 type of processor with peripheral and DMA controllers?.
A. Intel 8237.
B. Intel 8253.
C. MC68300.
D. MC68000.
Answer= MC68300