1. Which of the following is a set of specially selected input patterns?.
A. test pattern.
B. debugger pattern.
C. bit pattern.
D. byte pattern.
Answer= test pattern
2. Which is applied to a manufactured system?.
A. bit pattern.
B. parity pattern.
C. test pattern.
D. byte pattern.
Answer= test pattern
3. Which of the following is based on fault models?.
A. alpha-numeric pattern.
B. test pattern.
C. bit pattern.
D. parity pattern.
Answer= test pattern
4. Which is also called stuck-at model?.
A. byte pattern.
B. parity pattern.
C. bit pattern.
D. test pattern.
Answer= test pattern
5. How is the quality of the test pattern evaluated?.
A. fault coverage.
B. test pattern.
C. size of the test pattern.
D. number of errors.
Answer= fault coverage
6. What is DfT?.
A. discrete Fourier transform.
B. discrete for transaction.
C. design for testability.
D. design Fourier transform.
Answer= design for testability
7. Which of the following is also known as boundary scan?.
A. test pattern.
B. JTAG.
C. FSM.
D. CRC.
Answer= JTAG
8. What does BILBO stand for?.
A. built-in logic block observer.
B. bounded input bounded output.
C. built-in loading block observer.
D. built-in local block observer.
Answer= built-in logic block observer
9. What is CRC?.
A. code reducing check.
B. counter reducing check.
C. counting redundancy check.
D. cyclic redundancy check.
Answer= cyclic redundancy check
10. What is FSM?.
A. Fourier state machine.
B. finite state machine.
C. fast state machine.
D. free state machine.
Answer= finite state machine
11. Which of the following have flip-flops which are connected to form shift registers?.
A. scan design.
B. test pattern.
C. bit pattern.
D. CRC.
Answer= scan design
12. Which is a top-down method of analyzing risks?.
A. FTA.
B. FMEA.
C. Hazards.
D. Damages.
Answer= FTA
13. What is FTA?.
A. free tree analysis.
B. fault tree analysis.
C. fault top analysis.
D. free top analysis.
Answer= fault tree analysis
14. Which gate is used in the geometrical representation, if a single event causes hazards?.
A. AND.
B. NOT.
C. NAND.
D. OR.
Answer= OR
15. Which analysis uses the graphical representation of hazards?.
A. Power model.
B. FTA.
C. FMEA.
D. First power model.
Answer= FTA
16. Which gate is used in the graphical representation, if several events cause hazard?.
A. OR.
B. NOT.
C. AND.
D. NAND.
Answer= AND
17. What is FMEA?.
A. fast mode and effect analysis.
B. front mode and effect analysis.
C. false mode and effect analysis.
D. failure mode and effect analysis.
Answer= failure mode and effect analysis
18. Which of the following can compute the exact number of clock cycles required to run an application?.
A. layout model.
B. coarse-grained model.
C. fine-grained model.
D. register-transaction model.
Answer= fine-grained model
19. Which model is capable of reflecting the bidirectional transfer of information?.
A. switch-level model.
B. gate level.
C. layout model.
D. circuit-level model.
Answer= switch-level model
20. What is meant by FOL?.
A. free order logic.
B. fast order logic.
C. false order logic.
D. first order logic.
Answer= first order logic
21. What is HOL?.
A. higher order logic.
B. higher order last.
C. highly organised logic.
D. higher order less.
Answer= higher order logic
22. What is BDD?.
A. boolean decision diagram.
B. binary decision diagrams.
C. binary decision device.
D. binary device diagram.
Answer= binary decision diagrams
23. Which formal verification techni consists of a Boolean formula?.
A. HOL.
B. FOL.
C. Propositional logic.
D. Both HOL and FOL.
Answer= Propositional logic
24. Which of the following is also known as equivalence checker?.
A. BDD.
B. FOL.
C. Tautology checker.
D. HOL.
Answer= Tautology checker
25. Which of the following is possible to locate errors in the specification of the future bus protocol?.
A. EMC.
B. HOL.
C. BDD.
D. FOL.
Answer= BDD
26. Which of the following is a popular system for model checking?.
A. HOL.
B. FOL.
C. BDD.
D. EMC.
Answer= EMC
27. What is CTL?.
A. computational tree logic.
B. code tree logic.
C. cpu tree logic.
D. computer tree logic.
Answer= computational tree logic