Q1. What does the output enable do on the 74395A chip?.
A. It determines when data can be loaded..
B. It forces all outputs to go HIGH..
C. It forces all outputs to go LOW..
D. It activates the three-state buffer..
Answer= It activates the three-state buffer.
Q2. To operate correctly, starting a ring shift counter requires:.
A. clearing all the flip-flops.
B. presetting one flip-flop and clearing all others.
C. clearing one flip-flop and presetting all others.
D. presetting all the flip-flops.
Answer= presetting one flip-flop and clearing all others
Q3. In a 6-bit Johnson counter seQnce there are a total of how many states, or bit patterns?.
A. 2.
B. 6.
C. 12.
D. 24.
Answer= 12
Q4. A modulus-12 ring counter requires a minimum of ________..
A. 10 flip-flops.
B. 12 flip-flops.
C. 6 flip-flops.
D. 2 flip-flops.
Answer= 12 flip-flops
Q5. Stepper motors have become popular in digital automation systems because ________..
A. of their low cost.
B. they are driven by seQntial digital signals.
C. they can be used to provide repetitive mechanical movement.
D. they are driven by seQntial digital signals and can be used to provide repetitive mechanical movement.
Answer= they are driven by seQntial digital signals and can be used to provide repetitive mechanical movement
Q6. The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________..
A. 0 1110.
B. 0000 1.
C. 00 101.
D. 00 110.
Answer= 00 101
Q7. Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.).
A. 1100.
B. 00 11.
C. 000 0.
D. 1111.
Answer= 000 0
Q8. A serial in/parallel out, 4-bit shift register initially contains all 1s. The data nibble 0111 is waiting to enter. After four clock pulses, the register contains ________..
A. 000 0.
B. 1111.
C. 0 111.
D. 1000.
Answer= 0 111
Q9. With a 200 kHz clock freQncy, eight bits can be serially entered into a shift register in ________..
A. 4 ?s.
B. 40 ?s.
C. 400 ?s.
D. 40 ms.
Answer= 40 ?s
Q10. A seQnce of equally spaced timing pulses may be easily generated by which type of counter circuit?.
A. ring shift.
B. clock.
C. Johnson.
D. binary.
Answer= ring shift
Q11. The bit seQnce 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?.
A. 10011100.
B. 11000000.
C. 0000 1100.
D. 11110000.
Answer= 11000000
Q12. If an 8-bit ring counter has an initial state 10111110, what is the state after the fourth clock pulse?.
A. 11101011.
B. 000 10111.
C. 11110000.
D. 0 0000000.
Answer= 11101011
Q13. A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position(s) for each clock pulse..
A. right, one.
B. right, two.
C. left, one.
D. left, three.
Answer= right, one
Q14. How many clock pulses will be required to completely load serially a 5-bit shift register?.
A. 2.
B. 3.
C. 4.
D. 5.
Answer= 5
Q15. How is a strobe signal used when serially loading a shift register?.
A. to turn the register on and off.
B. to control the number of clocks.
C. to determine which output Qs are used.
D. to determine the FFs that will be used.
Answer= to control the number of clocks
Q16. What are the three output conditions of a three-state buffer?.
A. HIGH, LOW, float.
B. 1, 0, float.
C. both of the above.
D. neither of the above.
Answer= both of the above
Q17. The primary purpose of a three-state buffer is usually:.
A. to provide isolation between the input device and the data bus.
B. to provide the sink or source current required by any device connected to its output without loading down the output device.
C. temporary data storage.
D. to control data flow.
Answer= to provide isolation between the input device and the data bus
Q18. What is the difference between a ring shift counter and a Johnson shift counter?.
A. There is no difference..
B. A ring is faster..
C. The feedback is reversed..
D. The Johnson is faster..
Answer= The feedback is reversed.
Q19. When is it important to use a three-state buffer?.
A. when two or more outputs are connected to the same input.
B. when all outputs are normally HIGH.
C. when all outputs are normally LOW.
D. when two or more outputs are connected to two or more inputs.
Answer= when two or more outputs are connected to the same input
Q20. In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________..
A. 1110.
B. 000 1.
C. 1100.
D. 1000.
Answer= 000 1
Q21. The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains ________..
A. 10111000.
B. 10110111.
C. 11110000.
D. 11111100.
Answer= 11111100
Q22. By adding recirculating lines to a 4-bit parallel-in, serial-out shift register, it becomes a ________, ________, and ________-out register..
A. parallel-in, serial, parallel.
B. serial-in, parallel, serial.
C. series-parallel-in, series, parallel.
D. bidirectional in, parallel, series.
Answer= parallel-in, serial, parallel
Q23. What type of register would have a complete binary number shifted in one bit at a time and have all the stored bits shifted out one at a time?.
A. parallel-in, parallel-out.
B. parallel-in, serial-out.
C. serial-in, parallel-out.
D. serial-in, serial-out.
Answer= serial-in, parallel-out
Q24. When an 8-bit serial in/serial out shift register is used for a 20 s time delay, the clock freQncy is ________..
A. 40 kHz.
B. 50 kHz.
C. 400 kHz.
D. 500 kHz.
Answer= 400 kHz
Q25. Ring shift and Johnson counters are:.
A. synchronous counters.
B. aynchronous counters.
C. true binary counters.
D. synchronous and true binary counters.
Answer= synchronous counters
Q26. What is a transceiver circuit?.
A. a buffer that transfers data from input to output.
B. a buffer that transfers data from output to input.
C. a buffer that can operate in both directions.
D. None of the mentioned.
Answer= a buffer that can operate in both directions
Q27. A 74HC195 4-bit parallel access shift register can be used for ________..
A. serial in/serial out operation.
B. serial in/parallel out operation.
C. parallel in/serial out operation.
D. all of the above.
Answer= all of the above
Q28. Which type of device may be used to interface a parallel data format with external equipment's serial format?.
A. key matrix.
B. UART.
C. memory chip.
D. series in, parallel out.
Answer= UART
Q29. What is the function of a buffer circuit?.
A. to provide an output that is inverted from that on the input.
B. to provide an output that is equal to its input.
C. to clean up the input.
D. to clean up the output.
Answer= to provide an output that is equal to its input
Q30. What is the preset condition for a ring shift counter?.
A. all FFs set to 1.
B. all FFs cleared to 0.
C. a single 0, the rest 1.
D. a single 1, the rest 0.
Answer= a single 1, the rest 0
Q31. Which is not characteristic of a shift register?.
A. Serial in/parallel in.
B. Serial in/parallel out.
C. Parallel in/serial out.
D. Parallel in/parallel out.
Answer= Serial in/parallel in
Q32. To keep output data accurate, 4-bit series-in, parallel-out shift registers employ a ________..
A. divide-by-4 clock pulse.
B. seQnce generator.
C. strobe line.
D. multiplexer.
Answer= strobe line
Q33. Another way to connect devices to a shared data bus is to use a ________..
A. circulating gate.
B. transceiver.
C. bidirectional encoder.
D. strobed latch.
Answer= transceiver
Q34. To serially shift a nibble (four bits) of data into a shift register, there must be ________..
A. one clock pulse.
B. four clock pulses.
C. eight clock pulses.
D. one clock pulse for each 1 in the data.
Answer= four clock pulses
Q35. In a 4-bit Johnson counter seQnce there are a total of how many states, or bit patterns?.
A. 1.
B. 2.
C. 4.
D. 8.
Answer= 8
Q36. If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse?.
A. 1101000000.
B. 00 11010000.
C. 1100000000.
D. 0 0000000.
Answer= 00 11010000
Q37. How much storage capacity does each stage in a shift register represent?.
A. One bit.
B. Two bits.
C. Four bits (one nibble).
D. Eight bits (one byte).
Answer= One bit
Q38. When the output of a tristate shift register is disabled, the output level is placed in a:.
A. float state.
B. LOW state.
C. high-impedance state.
D. float or high-impedance state.
Answer= float or high-impedance state
Q39. How many outputs are on a BCD decoder?.
A. 4.
B. 16.
C. 8.
D. 10.
Answer= 10
Q40. Which digital system translates coded characters into a more useful form?.
A. encoder.
B. display.
C. counter.
D. decoder.
Answer= decoder