Q1. Assume that a particular IC has a supply voltage (Vcc) equal to +5 V and ICCH = 10 mA and ICCL = 23 mA. What is the power dissipation for the chip?.
A. 50 mW.
B. 82.5 mW.
C. 115 mW.
D. 165 mW.
Answer= 82.5 mW
Q2. What is the major advantage of ECL logic?.
A. very high speed.
B. wide range of operating voltage.
C. very low cost.
D. very high power.
Answer= very high speed
Q3. What is the difference between the 54XX and 74XX series of TTL logic gates?.
A. 54XX is faster..
B. 54XX is slower..
C. 54XX has a wider power supply and expanded temperature range..
D. 54XX has a narrower power supply and contracted temperature range..
Answer= 54XX has a wider power supply and expanded temperature range.
Q4. An open collector output can ________ current, but it cannot ________..
A. sink, source current.
B. source, sink current.
C. sink, source voltage.
D. source, sink voltage.
Answer= sink, source current
Q5. Why is a pull-up resistor needed when connecting TTL logic to CMOS logic?.
A. to increase the output LOW voltage.
B. to decrease the output LOW voltage.
C. to increase the output HIGH voltage.
D. to decrease the output HIGH voltage.
Answer= to increase the output HIGH voltage
Q6. The word "interfacing" as applied to digital electronics usually means:.
A. a conditioning circuit connected between a standard TTL NAND gate and a standard TTL OR gate.
B. a circuit connected between the driver and load to condition a signal so that it is compatible with the load.
C. any gate that is a TTL operational amplifier designed to condition signals between NMOS transistors.
D. any TTL circuit that is an input buffer stage.
Answer= a circuit connected between the driver and load to condition a signal so that it is compatible with the load
Q7. Ten TTL loads per TTL driver is known as:.
A. noise immunity.
B. fan-out.
C. power dissipation.
D. propagation delay.
Answer= fan-out
Q8. The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:.
A. a CMOS inverting bilateral switch between the stages.
B. a TTL tristate inverting buffer between the stages.
C. a CMOS noninverting bilateral switch between the stages.
D. a CMOS buffer or inverting buffer.
Answer= a CMOS buffer or inverting buffer
Q9. otem-pole outputs ________ be connected ________ because ________..
A. can, in parallel, sometimes higher current is required.
B. cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices.
C. should, in series, certain applications may require higher output voltage.
D. can, together, together they can handle larger load currents and higher output voltages.
Answer= cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
Q10. The high input impedance of MOSFETs:.
A. allows faster switching.
B. reduces input current and power dissipation.
C. prevents dense packing.
D. creates low-noise reactions.
Answer= reduces input current and power dissipation
Q11. The time needed for an output to change from the result of an input change is known as:.
A. noise immunity.
B. fan-out.
C. propagation delay.
D. rise time.
Answer= propagation delay
Q12. The problem of interfacing IC logic families that have different supply voltages (VCC's) can be solved by using a:.
A. level-shifter.
B. tristate shifter.
C. decoupling capacitor.
D. pull-down resistor.
Answer= level-shifter
Q13. What is the advantage of using low-power Schottky (LS) over standard TTL logic?.
A. more power dissipation.
B. less power dissipation.
C. cost is less.
D. cost is more.
Answer= less power dissipation
Q14. When is a level-shifter circuit needed in interfacing logic?.
A. A level shifter is always needed..
B. A level shifter is never needed..
C. when the supply voltages are the same.
D. when the supply voltages are different.
Answer= when the supply voltages are different
Q15. A TTL totem-pole circuit is designed so that the output transistors:.
A. are always on together.
B. provide linear phase splitting.
C. provide voltage regulation.
D. are never on together.
Answer= are never on together
Q16. The most common TTL series ICs are:.
A. E-MOSFET.
B. 7400.
C. quad.
D. AC00.
Answer= 7400
Q17. Which family of devices has the characteristic of preventing saturation during operation?.
A. TTL.
B. MOS.
C. ECL.
D. IIL.
Answer= ECL
Q18. How many 74LSTTL logic gates can be driven from a 74TTL gate?.
A. 10.
B. 20.
C. 200.
D. 400.
Answer= 20
Q19. What is the difference between the 74HC00 series and the 74HCT00 series of CMOS logic?.
A. The HCT series is faster..
B. The HCT series is slower..
C. The HCT series is input and output voltage compatible with TTL..
D. The HCT series is not input and output voltage compatible with TTL..
Answer= The HCT series is input and output voltage compatible with TTL.
Q20. Why are the maximum value of VOL and the minimum value of V(OD) used to determine the noise margin rather than the typical values for these parameters?.
A. These are worst-case conditions..
B. These are normal conditions..
C. These are best-case conditions..
D. It doesn't matter what values are used..
Answer= These are worst-case conditions.
Q21. What is the standard TTL noise margin?.
A. 5.0 V.
B. 0.0 V.
C. 0.8 V.
D. 0.4 V.
Answer= 0.4 V
Q22. Which logic family is characterized by a multiemitter transistor on the input?.
A. ECL.
B. CMOS.
C. TTL.
D. None of the above.
Answer= TTL
Q23. How does the 4000 series of CMOS logic compare in terms of speed and power dissipation to the standard family of TTL logic?.
A. more power dissipation and slower speed.
B. more power dissipation and faster speed.
C. less power dissipation and faster speed.
D. less power dissipation and slower speed.
Answer= less power dissipation and slower speed
Q24. Which is not a MOSFET terminal?.
A. Gate.
B. Drain.
C. Source.
D. Base.
Answer= Base
Q25. For a CMOS gate, which is the best speed-power product?.
A. 1.4 pJ.
B. 1.6 pJ.
C. 2.4 pJ.
D. 3.3 pJ.
Answer= 1.4 pJ