1. In the signal integrate phase, the differential input voltage between IN LO(input low) and IN HI(input high) pins is integrated by the internal integrator for a fixed period of
a. 256 clock cycles
b. 1024 clock cycles
c. 2048 clock cycles
d. 4096 clock cycles
Ans- c. 2048 clock cycles
2. Which of the following phase contain feedback loop in it?
a. autozero phase
b. signal integrate phase
c. disintegrate phase
d. none
Ans- a. autozero phase
3. Which of the following is not one of the phases of the total conversion cycle?
a. autozero phase
b. conversion phase
c. signal integrate phase
d. disintegrate phase
Ans- b. conversion phase
4. ADC 7109 integrated by Dual slope integration technique is used for
a. low cost option
b. slow practical applications
c. low complexity
d. all of the mentioned
Ans- d. all of the mentioned
5. The number of inputs that can be connected at a time to an ADC that is integrated with successive approximation is
a. 4
b. 2
c. 8
d. 16
Ans- c. 8
6. The conversion delay in a successive approximation of an ADC 0808/0809 is
a. 100 milliseconds
b. 100 microseconds
c. 50 milliseconds
d. 50 milliseconds
Ans- b. 100 microseconds
7. Which is the ADC among the following?
a. AD 7523
b. 74373
c. 74245
d. ICL7109
Ans- d. ICL7109
8. The procedure of algorithm for interfacing ADC contain
a. ensuring stability of analog input
b. issuing start of conversion pulse to ADC
c. reading digital data output of ADC as equivalent digital output
d. all of the mentioned
Ans- d. all of the mentioned
9. The popular technique that is used in the integration of ADC chips is
a. successive approximation
b. dual slope integration
c. successive approximation and dual slope integration
d. none
Ans- c. successive approximation and dual slope integration
10. The time taken by the ADC from the active edge of SOC(start of conversion) pulse till the active edge of EOC(end of conversion) signal is called
a. edge time
b. conversion time
c. conversion delay
d. time delay
Ans- c. conversion delay